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HV9911
Initial Release
Switch-mode LED Driver IC with High Current Accuracy
Features
Switch mode controller for single switch drivers o Buck o Boost o Buck-boost Works with high side current sensing Closed loop control of output current High PWM dimming ratio Internal 9 to 250V linear regulator (can be extended using external zener diodes) Internal 2% Voltage Reference (-40CGeneral Description
The HV9911 is a current mode control LED driver IC designed to control single switch PWM converters (buck, boost or buck-boost), in a constant frequency or constant off-time mode. The controller uses a peak current control scheme, (with programmable slope compensation), and includes an internal transconductance amplifier to control the output current in closed loop, enabling high output current accuracy (in the case of buck and buck-boost converters, the high side output current can be sensed by using the HV7800). In the constant frequency mode, multiple HV9911s can by synchronized to each other, or to an external clock, using the SYNC pin. Programmable MOSFET current limit enables current limiting during input under voltage and output overload conditions. The IC also includes a 0.25A source and 0.5A sink gate driver for high power applications. An internal 9 to 250V linear regulator powers the IC, eliminating the need for a separate power supply for the IC. HV9911 provides a TTL compatible, PWM dimming input that can accept an external control signal with a duty ratio of 0-100% and a frequency of up to a few kilohertz. The HV9911 based LED driver is ideal for RGB backlight applications with DC inputs. The HV9911 based LED Lamp drivers can achieve efficiency in excess of 90% for buck and boost applications.

Applications
RGB backlight applications Automotive LED driver application Battery Powered LED lamps Other DC/DC LED drivers
Typical Application Circuit
VIN CIN L1 CDD
VIN VDD GND
D1 ROVP1
CO
RT
RT
Q1 ROVP2
PWMD
GATE
RSLOPE
SC CS
HV9911
SYNC OVP FAULT
RSC
RCS
CREF
REF
Q2
RL2 RL1 RR1
CLIM IREF
FDBK
COMP
RS CC
RR2
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HV9911
Ordering Information
Package Options DEVICE 16-Lead SOIC
2
VDD IREF
Pin Assignment
1
VIN FDBK
16 15 14 13 12 11 10 9
HV9911
-G indicates package is RoHS compliant (`Green')
HV9911NG-G
3 4 5 6 7 8
GATE COMP
GND
PWMD
HV9911
CS OVP FAULT SC
RT
REF
SYNC
CLIM
Absolute Maximum Ratings
Parameter VIN to GND VDD to GND CS1, CS2 to GND PWMD to GND GATE to GND All other pins to GND Continuous Power Dissipation (TA = +25C) 16-Pin SOIC (derate 6.3mW/C above +25C) Operating Temperature Range Junction Temperature Storage Temperature Range 630mW -40C to +85C +125C -65C to +150C Value -0.5V to +250V -0.3V to +13.5V -0.3V to (VDD + 0.3V) -0.3V to (VDD + 0.3V) -0.3V to (VDD + 0.3V) -0.3V to (VDD + 0.3V)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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HV9911
Electrical Characteristics
(Over recommended operating conditions, VIN = 24V, TA = 25C, unless otherwise specified)
Symbol Input VINDC IINSD
Parameter
Min
Typ
Max
Units
Conditions
Input DC supply voltage range* Shut-Down mode supply current*
9 -
1.0
250 1.5
V mA
DC input voltage PWM_D connected to GND, VIN = 24V
Internal Regulator VDD UVLO UVLO VDD(ext) Reference VREF VREFLINE VREFLOAD REF pin voltage* 1.225 1.25 1.275 V REF bypassed with a 0.1F capacitor to GND; IREF= 0; VDD = 7.75V; PWMD = GND REF bypassed with a 0.1F capacitor to GND; IREF = 0; VDD = 7.25 - 12V; PWMD = GND REF bypassed with a 0.1F capacitor to GND; IREF = 0 - 500A; PWMD = GND Internally regulated voltage* VDD undervoltage lockout threshold VDD undervoltage lockout hysteresis Steady State External Voltage which can applied at the VDD pin1 7.25 6.65 7.75 6.90 500 8.25 7.20 12 V V mV V VIN = 9-250V, IDD(ext) = 0, PWMD connected to GND VDD rising -----
Line regulation of reference voltage Load regulation of reference voltage
0
-
20
mV
0
-
10
mV
PWM Dimming VPWMD(lo) VPWMD(hi) RPWMD GATE ISOURCE ISINK TRISE TFALL GATE short circuit current GATE sinking current GATE output rise time GATE output fall time 0.2 0.4 50 25
-
PWMD input low voltage* PWMD input high voltage* PWMD pull-down resistance
2.0 50
100
0.80 150
V V k
VDD = 7.25V - 12V VDD = 7.25V - 12V VPWMD = 5.0V
A A ns ns
VGATE = 0V; VDD = 7.75V VGATE = 7.75V ; VDD = 7.75V CGATE = 1nF; VDD = 7.75V CGATE = 1nF; VDD = 7.75V
85 45
Over Voltage Protection VOVP IC Shut down voltage* 1.215 1.25 1.285 V VDD = 7.25 - 12V ; OVP rising
Current Sense TBLANK TDELAY1 TDELAY2 VOFFSET Leading Edge Blanking Delay to Output of OP comparator Delay to Output of CLIMIT comparator Comparator Offset voltage 100 375 180 ns ns --OP = VDD ; CLIM = REF; CSENSE = 0 to 600mV step OP = VDD ; CLIM = 300mV ; CSENSE = 0 to 400mV step ---
-10
-
180 10
ns mV
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HV9911
Symbol Parameter Min Typ Max Units Conditions
Internal Transconductance Opamp GB AV VCM VO gm VOFFSET IBIAS Oscillator fOSC, MIN fOSC, MAX DMAX IOUTSYNC IINSYNC Minimum Oscillator frequency* Maximum Oscillator frequency* Maximum Duty cycle Sync output current Sync input current 22 308 0 25 350 90 10 28 392 20 200 kHz kHz % A A RT = 3.65M RT = 261k ----VSYNC < 0.1V Gainbandwidth product# Open Loop DC Gain Input common-mode range# Output Voltage Range# Transconductance Input Offset Voltage Input bias current# 66 -0.3 0.7 340 -3.0 1.0 435 0.5 3.0 6.75 530 3.0 1.0 MHz dB V A/V mV nA 75pF capacitance at OP pin Output Open --VDD = 7.75V -------
Output Short Circuit TOFF TRISE,FAULT TFALL,FAULT GFAULT Soft Start ICLIM Current into CLIM pin when pulled low 200 A FAULT is low ; 6.25k resistor between REF and CLIM Propagation time for short circuit detection Fault output rise time Fault output fall time Amplifier gain at NI pin 1.8 2 250 300 200 2.2 ns ns ns NI=200mV ; INV=450mV; FAULT goes from high to low 1nF capacitor at FAULT pin 1nF capacitor at FAULT pin NI=200mV
Slope Compensation ISLOPE GSLOPE
1
Current Sourced out of SLOPE pin Internal Current Mirror ratio
0 1.8
2
100 2.2
A -
--ISLOPE = 50A ; RCSENSE = 1k
Parameters are not guaranteed to be within specifications if the external VDD voltage is greater than VDD(ext) * Specifications which apply over the full operating ambient temperature range of -40C < TA < +85C. # Guaranteed by design
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HV9911
Pin Assignment
1 2 3 4 5 6 7 8
VIN FDBK
16 15 14 13 12 11 10 9
VDD
IREF
GATE
COMP
GND
PWMD
HV9911
CS OVP FAULT SC
RT
REF
SYNC
CLIM
Pin Description
Pin # 1 2 3 4 5 6 Pin VIN VDD GATE GND CS SC Description This pin is the input of a 9 - 250V high voltage regulator. This is a power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND (at least 0.1uF). This pin is the output gate driver for an external N-channel power MOSFET. Ground return for all circuits. This pin must be connected to the return path from the input. This pin is used to sense the drain current of the external power FET. It includes a built-in 100ns (min) blanking time. Slope compensation for current sense. A resistor between SC and GND will program the slope compensation. In case of constant off-time mode of operation, slope compensation is unnecessary and the pin can be left open. This pin sets the frequency or the off-time of the power circuit. A resistor between RT and GND will program the circuit in constant frequency mode. A resistor between RT and GATE will program the circuit in a constant off-time mode. This I/O pin may be connected to the SYNC pin of other HV9911 circuits and will cause the oscillators to lock to the highest frequency oscillator. This pin provides a programmable input current limit for the converter. The current limit can be set by using a resistor divider from the REF pin. Soft start can also be provided using this pin. This pin provides 2% accurate reference voltage. It must be bypassed with at least a 10nF capacitor to GND This pin is pulled to ground when there is an output short circuit condition or output over voltage condition. This pin can be used to drive an external MOSFET in the case of boost converters to disconnect the load from the source This pin provides the over voltage protection for the converter. When the voltage at this pin exceeds 1.25V, the gate output of the HV9912 is turned off and FAULT goes low. The IC will turn on when the power is recycled When this pin is pulled to GND (or left open), switching of the HV9911 is disabled. When an external TTL high level is applied to it, switching will resume Stable Closed loop control can be accomplished by connecting a compensation network between COMP and GND The voltage at this pin sets the output current level. The current reference can be set using a resistor divider from the REF pin This pin provides output current feedback to the HV9911 by using a current sense resistor
7 8 9 10 11
RT SYNC CLIM REF FAULT
12 13 14 15 16
OVP PWMD COMP IREF FDBK
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HV9911
Functional Block Diagram
VIN
Linear Regulator
Vbg
REF
VDD
POR GATE
CLIM
_
SS Blanking
100ns
+
FAULT
SC
+
SS
+
IREF COMP R One Shot
SS 2
Functional Description
Power Topology
Continuous mode buck and boost converters are ideal as LED drivers, as they can achieve high efficiencies greater than 90%. The HV9911 is a switch-mode converter LED driver designed to control a continuous conduction mode buck or boost in a constant frequency (or constant off-time) mode. The IC includes an internal linear regulator, which operates from input voltages of 9V to 250V eliminating the need for an external power supply for the IC. The IC includes features typically required in LED drivers like open LED protection, output short circuit protection, linear and PWM dimming, programmable input current limiting and accurate control of the LED current. A high current gate drive output enables the controller to be used in high power converters. external circuits connected at the VDD and VREF pins. This linear regulator can be turned off by overdriving the VDD pin using an external bootstrap circuit at voltages higher than 8.25V (up to 12V). The input voltage range of the IC can be increased to 450V by putting a 200V zener in series with the IC at the VIN pin. Although this linear regulator can power the IC by itself, at higher input voltages and/or higher operating temperatures, it might be necessary to supply power using an external bootstrap circuit as the excessive power dissipation in the IC might cause the IC to fail. This would also result in improved efficiencies for the overall circuit. Dropping the input voltage across an external zener diode would also help to divert the power dissipation away from the IC. The VDD pin of the IC should be bypassed with at least a 0.1F, low ESR capacitor.
Linear Regulator
The built in linear regulator operates from input voltages of 9V to 250V and provides a 7.75V voltage at the VDD pin. This 7.75V is used to power the IC and also provide the power to
6
_
FDBK
_
Gm
13R
PWMD
GND
+
Q
S
_
_
+
1:2
ramp S Q R POR Vbg OVP
+
CS
R
Q
_
SYNC RT
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HV9911
Reference
HV9911 includes a 2% accurate, 1.25V reference, which can be used as the reference for the output current as well as to set the switch current limit. This reference is also used internally to set the over voltage protection threshold. The reference is buffered so that it can deliver a maximum of 500A external current to drive the external circuitry. The reference should be bypassed with at least a 10nF low ESR capacitor.
Current Sense
The current sense input of the HV9911 includes a built in 100ns (minimum) blanking time to prevent spurious turn off due to the initial current spike when the FET turns on. The HV9911 includes two high-speed comparators - one is used during normal operation and the other is used to limit the maximum input current during input under voltage or overload conditions. The IC includes an internal resistor divider network, which steps down the voltage at the COMP pin by a factor of 15. This stepped-down voltage is given to one of the comparators as the current reference. The reference to the other comparator, which acts to limit the maximum inductor current, is given externally. It is recommended that the sense resistor RCS be chosen so as to provide about 250mV current sense signal.
Oscillator
The oscillator can be set in two ways. Connecting the oscillator resistor between the RT and GATE pins will program the off-time. Connecting the resistor between RT and GND will program the time period. In both cases, resistor RT sets the current, which charges an internal oscillator capacitor. The capacitor voltage ramps up linearly and when the voltage increases beyond the internal set voltage, a comparator triggers the SET input of the internal SR flip-flop. This starts the next switching cycle. The time period of the oscillator can be computed as:
Current Limit
Current limit has to be set by a resistor divider from the 1.25V reference available on the IC. Assuming a maximum operating inductor current ipk (including the ripple current), the maximum voltage at the CLIM pin can be set as:
Ts RT x 11 pF
Slope Compensation
For converters operating in the constant frequency mode, slope compensation becomes necessary to ensure stability of the peak current mode controller, if the operating duty cycle is greater than 0.5. Choosing a slope compensation which is one half of the down slope of the inductor current ensures that the converter will be stable for all duty cycles. Slope compensation can be programmed by two resistors RSLOPE and RSC. Assuming a down slope of DS (A/s) for the inductor current, the slope compensation resistors can be computed as: 10 x R
VCLIM 12 x I pk x Rcs + .
5 x Rsc x 0.9 Rslope
Note that this equation assumes a current limit at 120% of the maximum input current. Also, if VCLIM is greater than 450mV, the saturation of the internal opamp will determine the limit on the input current rather than the CLIM pin. In such a case, the sense resistor RCS should be reduced till VCLIM reduces below 450mV. It is recommended that no capacitor be connected between CLIM and GND. If necessary, the capacitor value must be chosen to be less than 1000pF.
Rslope =
SC
DS x 10 x Ts x Rcs
6
FAULT protection
The HV9911 has built-in output over-voltage protection and output short circuit protection. Both protection features are latched, which means that the power to the IC must be recycled to reset the IC. The IC also includes a FAULT pin which goes low during any fault condition. At startup, a monoshot circuit, (triggered by the POR circuit), resets an internal flip-flop which causes FAULT to go high, and remains high during normal operation. This also allows the gate drive to function normally. This pin can be used to drive an external disconnected switch (Q2 in the Typical Boost Application Circuit on pg.1), which will disconnect the load during a fault condition. This disconnect switch is very important in a boost converter, as turning off the switching FET (Q1) during
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A typical value for Rsc is 499. Note: The maximum current that can be sourced out of the SC pin is limited to 100A. This limits the minimum value of the RSLOPE resistor to 25k. If the equation for slope compensation produces a value of RSLOPE less than this value, then RSC would have to be reduced accordingly. It is recommended that RSLOPE be chosen in the range of 25k - 50k.
7
HV9911
an output short circuit condition will not remove the fault (Q1 is not in the path of the fault current). The disconnect switch will help to disconnect the shorted load from the input. When synchronized in this manner, a permanent HIGH or LOW condition on the SYNC pin will result in a loss of synchronization, but the HV9911 based converters will continue to operate at their individually set operating frequency. Since loss of synchronization will not result in total system failure, the SYNC pin is considered fault tolerant.
Over Voltage Protection
Over voltage protection is achieved by connecting the output voltage to the OVP pin through a resistive divider. The voltage at the OVP pin is constantly compared to the internal 1.25V. When the voltage at this pin exceeds 1.25V, the IC is turned off and FAULT goes low.
Internal 1MHz Transconductance Amplifier
HV9911 includes a built in 1MHz transconductance amplifier, with tri-state output, which can be used to close the feedback loop. The output current sense signal is connected to the FDBK pin and the current reference is connected to the IREF pin. The output of the opamp is controlled by the signal applied to the PWMD pin. When PWMD is high, the output of the opamp is connected to the COMP pin. When PWMD is low, the output is left open. This enables the integrating capacitor to hold the charge when the PWMD signal has turned off the gate drive. When the IC is enabled, the voltage on the integrating capacitor will force the converter into steady state almost instantaneously. The output of the opamp is buffered and connected to the current sense comparator using a 15:1 divider. The buffer helps to prevent the integrator capacitor from discharging during the PWM dimming state.
Output Short Circuit Protection
The output short circuit condition is indicated by FAULT. At startup, a monoshot circuit, (triggered by the POR circuit), resets an internal flip-flop, which causes FAULT to go high, and remains high during normal operation. This also allows the gate drive to function normally. The steady state current is reflected in the reference voltage connected to the transconductance amplifier. The instantaneous output current is sensed from the INV terminal of the amplifier. The short circuit threshold current is internally set to 200% of the steady state current. During short circuit condition, when the current exceeds the internally set threshold, the SR flip-flop is set and FAULT goes low. At the same time, the gate driver of the power FET is inhibited, providing a latching protection. The system can be reset by cycling the input voltage to the IC. Note: The short circuit FET should be connected before the current sense resistor as reversing RS and Q2 will affect the accuracy of the output current (due to the additional voltage drop across Q2 which will be sensed).
Linear Dimming
Linear dimming can be accomplished by varying the voltage at the IREF pin, as the output current is proportional to the voltage at the IREF pin. This can be done either by using a potentiometer from the REF pin or by applying an external voltage source at the IREF pin. Note that due to the offset voltage of the transconductance opamp, pulling the IREF pin very close to GND will cause the internal short circuit comparator to trigger and shut down the IC. This limits the linear dimming range of the IC. However, a 1:10 linear dimming range can be easily obtained. It is recommended that the PWMD pin be used to get zero output current rather than pull the IREF pin to GND.
Synchronization
The SYNC pin is an input/output (I/O) port to a fault tolerant peer-to-peer and/or master clock synchronization circuit. For synchronization, the SYNC pins of multiple HV9911 based converters can be connected together and may also be connected to the open drain output of a master clock. When connected in this manner, the oscillators will lock to the device with the highest operating frequency. When synchronizing multiple ICs, it is recommended that the same timing resistor be (corresponding to the switching frequency) be used in all the HV9911 circuits. In rare occasions, given the length of the connecting lines for the SYNC pins, a resistor between SYNC and GND may be required to damp any ringing due to parasitic capacitances. It is recommended that the resistor chosen be greater than 300k.
PWM Dimming
PWM dimming can be achieved by driving the PWMD pin with a TTL compatible square wave source. The PWM signal is connected internally to the three different nodes - the transconductance amplifier, the FAULT output, and the GATE output. When the PWMD signal is high, the GATE and FAULT pins are enabled, and the output of the transconductance opamp is connected to the external compensation network. Thus,
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HV9911
the internal amplifier controls the output current. When the PWMD signal goes low, the output of the transconductance amplifier is disconnected from the compensation network. Thus, the integrating capacitor maintains the voltage across it. The GATE is disabled, so the converter stops switching and the FAULT pin goes low, turning off the disconnect switch. The output capacitor of the converter determines the PWM dimming response of the converter, since it has to get charged and discharged whenever the PWMD signal goes high or low. In the case of a buck converter, since the inductor current is continuous, a very small capacitor is used across the LEDs. This minimizes the effect of the capacitor on the PWM dimming response of the converter. However, in the case of a boost converter, the output current is discontinuous, and a very large output capacitor is required to reduce the ripple in the LED current. Thus, this capacitor will have a significant impact on the PWM dimming response. By turning off the disconnect switch when PWMD goes low, the output capacitor is prevented from being discharged, and thus the PWM dimming response of the boost converter improves dramatically. Note that disconnecting the capacitor might cause a sudden spike in the capacitor voltage as the energy in the inductor is dumped into the capacitor. This might trigger the OVP comparator if the OVP point is set too close to the maximum operating voltage. Thus, either the capacitor has to sized slightly larger or the OVP set point has to be increased.
16-LEAD SO PACKAGE (NG) (NARROW BODY)
0.3895 0.0045 (9.8935 0.1145)
0.156 0.002 (3.962 0.051)
0.2335 0.0105 (5.931 0.267)
0.500 TYP. (12.700)
0.350 TYP. (8.890) 0.0255 0.0005 (0.6475 0.0125)
0.193 0.012 (4.9022 0.3048) 0.013 0.004 (0.3302 0.1016)
0.065 0.004 (1.651 0.102)
7 (4 PLCS) 0.009 0.002 (0.216 0.038) 45
0 - 8 0.059 0.002 (1.499 0.051) 0.020 0.002 (0.508 0.0508) 0.050 TYP. (1.270) 0.0165 0.0035 (0.4191 0.0889) 0.006 0.002 (0.1524 0.0508) 7 (4 PLCS)
0.033 0.017 (0.8382 0.4318)
0.0275 0.0025 (0.6985 0.0635)
Measurement Legend =
Dimensions in Inches (Dimensions in Millimeters)
Doc.# DSFP - HV9911 NR011206
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